SYCL Workshop

Overview

Welcome to this ENCCS workshop, in collaboration with CSC Finland and Izum, Slovenia.

SYCL is a C++ abstraction layer for programming heterogeneous hardware with a single-source approach. SYCL is high-level, cross-platform, and extends standard ISO C++17. You will learn to:

• Use the hipSYCL compiler to generate executable for multiple hardware targets.
• Write hardware-agnostic code to express parallelism using the queue, command group, and kernel abstractions.
• Use buffer and accessors to handle memory across devices.
• Evaluate drawbacks and advantages of unified shared memory.

The training will run on the EuroHPC JU Vega system. For VEGA specs and other details, visit https://doc.vega.izum.si.

Preliminary Agenda

Day 1 – Monday 8 November 2021

Day 2 – Tuesday 9 November 2021

Registration

Registrations are now closed for this event.

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This training is intended for users established in the European Union or a country associated to Horizon 2020.